Introduction

Welcome to the Embedded University online! This space on the web is to help you keep track of the latest happenings in Embedded world, helping embedded system developers produce better products faster. I hope this will help you find better ways to build embedded systems and at the same time, maximizing the fun!

Saturday, November 18, 2006

Will we ever need memory in excess of 640K? - Part 1

Couple of decades ago we would have told ourselves that who's ever gonna need more than 640K of RAM. But today we ask ourselves can memory requirements be bound? Every new generation of consumer electronic gadget has applications that bedazzle the senses, greedily devouring more memory in the process. One can watch the latest video on a cell phone, take a picture with a pen and get the latest weather info on a wristwatch. Try doing that with 640KB of RAM! This article is a three part series dealing with the challenge of Embedded memory devices.

As we push towards greater integration, current system-on-chip (SOC) designs dramatically increase memory content and show no signs of relenting. According to the Semiconductor Industry Association (SIA), memory already dominates over 60% of silicon area in SOC designs, and is projected to represent over 90% of the die area by end of the decade. New SOC designs are beginning to take on the appearance of a memory-chip with logic surrounding it.

The predominance of memory in SOC designs is made more acute by the variety of memory types that are being used today. The multi-functional nature of current designs is reflected by the International Technology Roadmap for Semiconductors (ITRS). Having an SOC design embedded with a DRAM along with a CAM, an EPROM, and a multi-port SRAM is not uncommon.

There can be several instances of the same memory that might exist on the chip with different architectures for high-performance, low-power, other form-factors, and so on. These variations require that, for design and analysis purposes, multiple instances of the same memory be treated as distinct entities.

The rule is - smaller device sizes, greater the advantage including greater functionality per chip, lower overall cost and higher portability, but they have also resulted in an ever-increasing set of design and manufacturing challenges. We shall restrict our discussion to issues that affect the simulation and verification of these embedded memory designs and some possible solutions.

From the Embedded designer's view, the key points to consider are high speed operation, low power consumption, robustness (i.e., correct data at correct location) and process compatibility

I'll be dealing with each of these in part two.


0 Comments: